Friday, April 28, 2006

Delay Example

module top ;
reg a , b ;
wire c ;
nanf201 G1(c,a,b);

initial
begin a = 0 ;
b = 0 ;
#400 $finish ;
end

always
#40 a = ~ a ;

always
#80 b = ~ b ;

endmodule

module nanf201(O, A1, B1);
input A1, B1;
output O;

nand(O, A1,B1);

specify
specparam
Tpd_0_1 = 1.13:3.09:7.75,
Tpd_1_0 = 0.93:2.50:7.34;

(A1=>O) = (Tpd_0_1, Tpd_1_0);
(B1=>O) = (Tpd_0_1, Tpd_1_0);

endspecify

endmodule

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